1. Field of the Invention
This invention pertains to a method of fabricating a liquid crystal display having a pixel electrode, wherein an etchant having low damage to metals enhances yields of the pixel electrode and a thin film transistor.
2. Description of the Related Art
A liquid crystal display (LCD) with an active matrix driving system uses thin film transistors (TFT's) as switching devices to display a natural moving picture. Since such a LCD can be made into a device having a smaller size than the existent Brown tube, it has been widely used as a monitor for a personal computer or a notebook computer as well as for office automation equipment such as a copy machine or portable equipment such as a cellular phone or a pager.
FIG. 1A to FIG. 1D show a conventional process of fabricating a LCD.
Referring to FIG. 1A, aluminum (Al) or copper (Cu) is deposited on a transparent substrate 11 at a thickness of about 1500 to 4000 Å by a sputtering technique to form a metallic thin film. The metallic thin film is patterned by photolithography, including a wet method step, to thereby form a gate electrode 13 on the transparent substrate 11.
Referring to FIG. 1B, a gate insulating film 15, an active layer 17 and an ohmic contact layer 19 are sequentially formed on the transparent substrate 11 by a chemical vapor deposition (CVD) technique in a manner to cover the gate electrode 13. A gate insulating film 15 is formed by depositing an insulation material such as silicon oxide (SiOx) or silicon nitride (SiNx) on the transparent substrate 11 at a thickness of about 3000 to 5000 Å. The active layer 17 is formed by depositing undoped amorphous silicon or undoped polycrystalline silicon onto a portion corresponding to the gate electrode 13 on the gate insulating film 15 at a thickness of about 1500 to 2000 Å. The ohmic contact layer 19 is formed by depositing an amorphous silicon or a polycrystalline silicon doped with a n-type or p-type impurity at a high concentration onto each side portion on the active layer 17 of a thickness of about 200 to 500 Å. The ohmic contact layer 19 is not formed at a middle portion of the active layer 17.
The ohmic contact layer 19 and the active layer 17 are patterned by photolithography, including anisotropic etching, in such a manner to remain only at a portion corresponding to the gate electrode 13.
Referring to FIG. 1C, a metal such as molybdenum (Mo), chromium (Cr), titanium (Ti) or tantalum (Ta), etc., or a molybdenum alloy such as MoW, MoTa or MoNb, etc. is deposited on the gate insulating film 15 at a thickness of about 1000 to 2000 Å by CVD or sputtering to cover the ohmic contact layer 19, thereby forming a metallic thin film. In this case, the ohmic contact layer 19 makes ohmic contact with the metallic thin film.
Subsequently, a photoresist pattern 25 is formed at a portion corresponding to each side of the gate electrode 13 by coating photoresist on the metallic thin film and then exposing and developing it. The metallic thin film is wet etched according to the photoresist pattern 25 to form source and drain electrodes 21 and 23. The exposed portion of the ohmic contact layer 19 is dry etched according to the photoresist and the source and drain electrodes 21 and 23 in a manner so as to expose the active layer 17. At this time, the ohmic contact layer 19 is etched to be inconsistent with, i.e., offset to, the side surface of the photoresist pattern 25, and the active layer 17 at the portion corresponding to the gate electrode 13 between the unetched ohmic contact layer 19 and the active layer 17, thereby forming a channel.
Referring to FIG. 1D, the photoresist pattern 25 is removed. A passivation layer 27 is formed on the gate insulating layer 15 so as to cover the source and drain electrodes 21 and 23. The passivation layer 27 is made from an inorganic insulating material such as silicon nitride silicon oxide, etc. The passivation layer 27 can also be made from an organic insulation material having a small dielectric constant such as an acrylic organic compound, i.e., an acrylic, TEFLON (polytetrafluoroethylene), BCB (benzocyclobutene), CYTOP (fluoropolymer resin) or PFCB (perfluorocyclobutane), etc. Since step coverage between the active layer 17 and the source and drain electrodes 21 and 23 becomes reduced due to the ohmic contact layer 19, a surface evenness of the passivation layer 27 increases.
The, the passivation layer 27 is patterned by photolithography to define a contact hole 28 for exposing the drain electrode 23. A transparent conductive material such as indium tin oxide (ITO), tin oxide (TO) or indium zinc oxide (IZO) is deposited onto the passivation layer 27 in a manner to contact the drain electrode 23 via the contact hole 28. The transparent conductive material is then patterned by photolithography to form a pixel electrode 29.
Prior to deposition of the pixel electrode 29, pre-heating is first performed. After pre-heating, the pixel electrode 29 is deposited in a high-temperature vacuum chamber at a deposition temperature of more than 400° C. Upon deposition at high temperature, the pixel electrode 29 crystallizes.
This deposition process results in the pixel electrode 29 having inferior etch characteristics due to the interplay of polyamorphous and crystalline states. As a result, it becomes necessary to use a strong acid (HCl series) etchant or to etch for an extended time period. After this etch process, the gate electrode is damaged and a metallic residue remains, thereby causing problems relating to uniformity and subsequently affect to the post process. As a result, there is a need to manufacture liquid crystal displays utilizing etch technologies that minimize damage to the display structure.